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半导体硅片；8 in；12 in；产业协同；先进制程 1

异质光子集成；光互连；晶圆级测试分析 1

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Special issue: Technologies for future high-efficiency industrial silicon wafer solar cells

《能源前沿（英文）》 2017年第11卷第1期页码 1-3 doi: 10.1007/s11708-016-0436-4

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Patterned wafer bonding using ultraviolet adhesive

Rui ZHUO, Guanglan LIAO, Wenliang LIU, Lei NIE, Tielin SHI

《机械工程前沿（英文）》 2011年第6卷第2期页码 214-218 doi: 10.1007/s11465-011-0130-5

摘要：

The process of patterned wafer bonding using ultraviolet (UV) adhesive as the intermediate layer was studied. By presetting the UV adhesive guide-layer, controlling the thickness of the intermediate layer (1– 1.5 μm), appropriate pre-drying temperature (60°C), and predrying time (6 min), we obtained the intermediate layer bonding of patterned quartz/quartz. Experimental results indicate that patterned wafer bonding using UV adhesive is achieved under room temperature. The process also has advantages of easy operation, low cost, and no plugging or leakage in the patterned area after bonding. Using the process, a microfluidic chip for red blood cell counting was designed and fabricated. Patterned wafer bonding using UV adhesive will have great potential in the fabrication of microfluidic chips.

关键词： ultraviolet (UV) adhesive intermediate layer patterned wafer bonding

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High-quality industrial n-type silicon wafers with an efficiency of over 23% for Si heterojunction solar cells

Fanying MENG,Jinning LIU,Leilei SHEN,Jianhua SHI,Anjun HAN,Liping ZHANG,Yucheng LIU,Jian YU,Junkai ZHANG,Rui ZHOU,Zhengxin LIU

《能源前沿（英文）》 2017年第11卷第1期页码 78-84 doi: 10.1007/s11708-016-0435-5

摘要： n-type CZ-Si wafers featuring longer minority carrier lifetime and higher tolerance of certain metal contamination can offer one of the best Si-based solar cells. In this study, Si heterojuction (SHJ) solar cells which was fabricated with different wafers in the top, middle and tail positions of the ingot, exhibited a stable high efficiency of>22% in spite of the various profiles of the resistivity and lifetime, which demonstrated the high material utilization of n-type ingot. In addition, for effectively converting the sunlight into electrical power, the pyramid size, pyramid density and roughness of surface of the Cz-Si wafer were investigated by scanning electron microscope (SEM) and transmission electron microscope (TEM). Furthermore, the dependence of SHJ solar cell open-circuit voltage on the surface topography was discussed, which indicated that the uniformity of surface pyramid helps to improve the open-circuit voltage and conversion efficiency. Moreover, the simulation revealed that the highest efficiency of the SHJ solar cell could be achieved by the wafer with a thickness of 100 µm. Fortunately, over 23% of the conversion efficiency of the SHJ solar cell with a wafer thickness of 100 µm was obtained based on the systematic optimization of cell fabrication process in the pilot production line. Evidently, the large availability of both n-type ingot and thinner wafer strongly supported the lower cost fabrication of high efficiency SHJ solar cell.

关键词： n-type Cz-Si thinner wafer surface texture high efficiency SHJ solar cell

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Effects of taping on grinding quality of silicon wafers in backgrinding

Zhigang DONG, Qian ZHANG, Haijun LIU, Renke KANG, Shang GAO

《机械工程前沿（英文）》 2021年第16卷第3期页码 559-569 doi: 10.1007/s11465-020-0624-0

摘要： Taping is often used to protect patterned wafers and reduce fragmentation during backgrinding of silicon wafers. Grinding experiments using coarse and fine resin-bond diamond grinding wheels were performed on silicon wafers with tapes of different thicknesses to investigate the effects of taping on peak-to-valley (PV), surface roughness, and subsurface damage of silicon wafers after grinding. Results showed that taping in backgrinding could provide effective protection for ground wafers from breakage. However, the PV value, surface roughness, and subsurface damage of silicon wafers with taping deteriorated compared with those without taping although the deterioration extents were very limited. The PV value of silicon wafers with taping decreased with increasing mesh size of the grinding wheel and the final thickness. The surface roughness and subsurface damage of silicon wafers with taping decreased with increasing mesh size of grinding wheel but was not affected by removal thickness. We hope the experimental finding could help fully understand the role of taping in backgrinding.

关键词： taping silicon wafer backgrinding subsurface damage surface roughness

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MEMS-based thermoelectric infrared sensors: A review

Dehui XU, Yuelin WANG, Bin XIONG, Tie LI

《机械工程前沿（英文）》 2017年第12卷第4期页码 557-566 doi: 10.1007/s11465-017-0441-2

摘要：

In the past decade, micro-electromechanical systems (MEMS)-based thermoelectric infrared (IR) sensors have received considerable attention because of the advances in micromachining technology. This paper presents a review of MEMS-based thermoelectric IR sensors. The first part describes the physics of the device and discusses the figures of merit. The second part discusses the sensing materials, thermal isolation microstructures, absorber designs, and packaging methods for these sensors and provides examples. Moreover, the status of sensor implementation technology is examined from a historical perspective by presenting findings from the early years to the most recent findings.

关键词： thermoelectric infrared sensor CMOS-MEMS thermopile micromachining wafer-level package

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Fabrication of Si-based three-dimensional microbatteries: A review

Chuang YUE, Jing LI, Liwei LIN

《机械工程前沿（英文）》 2017年第12卷第4期页码 459-476 doi: 10.1007/s11465-017-0462-x

摘要：

High-performance, Si-based three-dimensional (3D) microbattery systems for powering micro/nano-electromechanical systems and lab-on-chip smart electronic devices have attracted increasing research attention. These systems are characterized by compatible fabrication and integratibility resulting from the silicon-based technologies used in their production. The use of support substrates, electrodes or current collectors, electrolytes, and even batteries used in 3D layouts has become increasingly important in fabricating microbatteries with high energy, high power density, and wide-ranging applications. In this review, Si-based 3D microbatteries and related fabrication technologies, especially the production of micro-lithium ion batteries, are reviewed and discussed in detail in order to provide guidance for the design and fabrication.

关键词： three-dimensional (3D) wafer-scale Si-based anode micro-LIBs thin-film deposition

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Eddy current measurement of the thickness of top Cu film of the multilayer interconnects in the integrated circuit (IC) manufacturing process

Zilian QU,Yonggang MENG,Qian ZHAO

《机械工程前沿（英文）》 2015年第10卷第1期页码 1-6 doi: 10.1007/s11465-015-0325-2

摘要：

This paper proposes a new eddy current method, named equivalent unit method (EUM), for the thickness measurement of the top copper film of multilayer interconnects in the chemical mechanical polishing (CMP) process, which is an important step in the integrated circuit (IC) manufacturing. The influence of the underneath circuit layers on the eddy current is modeled and treated as an equivalent film thickness. By subtracting this equivalent film component, the accuracy of the thickness measurement of the top copper layer with an eddy current sensor is improved and the absolute error is 3 nm for sampler measurement.

关键词： CMP eddy current multilayer wafer Cu interconnects equivalent unit

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我国半导体硅片发展现状与展望

张果虎,肖清华,马飞

《中国工程科学》 2023年第25卷第1期页码 68-78 doi: 10.15302/J-SSCAE-2023.01.002

摘要：

硅片是半导体关键的基础材料，我国半导体硅片对外依存度较高，增强硅片的自主保障能力，对提升我国半导体产业整体水平至关重要。本文重点围绕市场主流的8 in、12 in硅片，分析了全球半导体硅片的技术和产业发展现状，研判了全球半导体硅片产业未来的发展趋势，重点分析了我国半导体硅片的发展现状，指出我国半导体硅片在当前市场需求、宏观政策、配套能力、研发投入等利好因素下迎来难得的发展机遇，同时提出我国半导体硅片产业发展面临挑战，在此基础上，从进一步加强顶层设计和宏观规划、强化政策落实和政策持续性、协调支持产业链协同发展、布局研发集成电路先进制程用半导体硅片等方面提出对策建议，以期为推动我国半导体硅片向更高质量发展提供参考。

关键词：半导体硅片；8 in；12 in；产业协同；先进制程

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III-V/Si异质光子集成：组件及其特性 Special Feature on Optoelectronic Devices and Inte

Shang-jian ZHANG, Yong LIU, Rong-guo LU, Bao SUN, Lian-shan YAN

《信息与电子工程前沿（英文）》 2019年第20卷第4期页码 472-480 doi: 10.1631/FITEE.1800482

摘要： III-V/Si异质光子集成被视为实现能源效率和成本效率的光互连关键技术之一，在未来高性能计算机和数据中心有极大潜力。本文综述了包括收发器件和组件的III-V/Si异质光子集成的最新研究进展，并报告了在光子集成回路，特别是异质集成平台上实现光子集成回路的晶圆级测试分析进展。

关键词：异质光子集成；光互连；晶圆级测试分析

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Special issue: Technologies for future high-efficiency industrial silicon wafer solar cells

期刊论文

Patterned wafer bonding using ultraviolet adhesive